The next wave of AI computing could ride on the back of a packaging revolution. Dr. Larry Zu, CEO of Sarcina Technology, believes Bump Pitch Transformers (BPTs) are poised to dramatically accelerate the adoption of 2.5D IC packaging – a critical component in meeting the soaring demand for AI hardware.
Speaking at the Design Automation Conference, Zu highlighted Fan-Out Chip-on-Substrate with Silicon Bridge (FoCoS-B) as the latest BPT breakthrough. This technology, now available through companies like ASE and SPIL, promises to democratize 2.5D packaging by replacing costly silicon interposers with more economical redistribution layers.
Sarcina Technology provides a choice of either silicon bridge or chip-last technologies
FoCoS-B’s architecture is tailor-made for integrating both homogeneous and heterogeneous chiplets, a key requirement for high-performance AI, data center, and networking applications. It tackles a major pain point in current 2.5D packaging: the need for expensive, hard-to-source substrates that convert chip microbumps to package-level bumps.
Sarcina is already working with partners on BPT variants across multiple applications. The company offers comprehensive services, from BPT interposer design to final package assembly and testing. Zu pointed to past successes, including a massive 2,019-ball flip-chip package featuring an ASIC and HBM chiplets, as a glimpse of what’s possible.
“This is just the beginning,” Zu emphasized. As BPT technology matures, it could unlock new realms of AI chip design, bringing high-performance computing to a broader range of applications and potentially accelerating the pace of AI innovation.
