The image at left shows a design with power and signal wires intermingled on the top of the wafer. The image at right shows the new PowerVia technology, Intel’s unique industry-first implementation of a backside power delivery network. PowerVia was introduced at the "Intel Accelerated" event on July 26, 2021. At the event, Intel presented the company's future process and packaging technology roadmaps. (Credit: Intel Corporation)
Intel pushes to accelerate process and packaging innovations
Intel Corporation today revealed one of the most detailed processes and packaging technology roadmaps the company has ever provided, showcasing a series of foundational innovations that will power products through 2025 and beyond. In addition to announcing RibbonFET, its first new transistor architecture in more than a decade, and PowerVia, an industry-first new backside power delivery method, the company highlighted its planned swift adoption of next-generation extreme ultraviolet lithography (EUV), referred to as High Numerical Aperture (High NA) EUV. Intel is positioned to receive the first High NA EUV production tool in the industry.
The industry has long recognized that traditional nanometer-based process node naming stopped matching the actual gate-length metric in 1997. Today, Intel introduced a new naming structure for its process nodes, creating a clear and consistent framework to give customers a more accurate view of process nodes across the industry. This clarity is more important than ever with the launch of Intel Foundry Services.