AMD revealed at the prestigious International Solid State Circuits Conference (ISSCC) that the upcoming A-Series Accelerated Processing Unit (APU), codenamed “Carrizo”, for notebooks and low-power desktops will deliver a wealth of new, advanced power management technologies while achieving substantial performance through new “Excavator” x86 CPU cores and a new generation of AMD Radeon GPU cores. Using a true System-on-Chip (SoC) design, AMD expects Carrizo to reduce the power consumed by the x86 cores alone by 40 percent, while also providing substantial gains in CPU, graphics, and multimedia performance over the prior generation APU.
“As a part of our continued focus on building great products, the advanced power and performance optimizations we have designed into our upcoming ‘Carrizo’ APU will deliver the largest generational performance-per-watt gain ever for a mainstream AMD APU” Sam Naffziger, AMD Corporate Fellow and co-author of the AMD presentation at ISSCC.
“There have been remarkable advances in performance and energy efficiency in computing since the birth of the modern microprocessor. However, the energy-related benefits that flow from new manufacturing processes have slowed, ushering in an era when alternative ways to improve processor performance and efficiency are needed. AMD has been pursuing Heterogeneous System Architecture (HSA) and proprietary power management technologies to make continued gains. The upcoming ’Carrizo’ APU takes a big step toward the AMD 25×20 energy efficiency goal and incorporates a wealth of new features that will be adopted across our full product line going forward.”
New Carrizo Disclosures at ISSCC:
- 29% more transistors in nearly the same die size as its predecessor, “Kaveri”;
- New “Excavator” x86 cores provide an uplift in instructions-per-clock at 40% less power;
- New Radeon GPU cores with dedicated power supply;
- Dedicated, on-chip H.265 video decode;
- Double digit percentage increases in both performance and battery life;
- Integrated Southbridge for the first time on an AMD high-performance APU.
Details will be presented today at the AMD ISSCC session, “A 28nm x86 APU Optimized for Power and Area Efficiency,” by AMD Fellow and Design Engineer Kathy Wilcox. The presentation covers the technology, implementation, and power management features of the Carrizo APU.
